File nosse4-avx.patch of Package llvm - SailfishOS Open Build Service

File nosse4-avx.patch of Package llvm (Revision 4)

Currently displaying revision 4, show latest

diff -ru llvm-3.3.src/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
--- llvm-3.3.src/lib/Target/X86/X86Subtarget.cpp	2013-05-08 19:15:09.000000000 +1000
+++ b/lib/Target/X86/X86Subtarget.cpp	2013-11-25 16:06:18.000000000 +1100
@@ -210,11 +210,13 @@
   if ((EDX >> 26) & 1) { X86SSELevel = SSE2;  ToggleFeature(X86::FeatureSSE2); }
   if (ECX & 0x1)       { X86SSELevel = SSE3;  ToggleFeature(X86::FeatureSSE3); }
   if ((ECX >> 9)  & 1) { X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3);}
+#if 0
   if ((ECX >> 19) & 1) { X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);}
   if ((ECX >> 20) & 1) { X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);}
   if (((ECX >> 27) & 1) && ((ECX >> 28) & 1) && OSHasAVXSupport()) {
     X86SSELevel = AVX;   ToggleFeature(X86::FeatureAVX);
   }
+#endif
 
   bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
   bool IsAMD   = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
@@ -339,6 +341,7 @@
         HasHLE = true;
         ToggleFeature(X86::FeatureHLE);
       }
+#if 0
       if (IsIntel && ((EBX >> 5) & 0x1)) {
         X86SSELevel = AVX2;
         ToggleFeature(X86::FeatureAVX2);
@@ -347,6 +350,7 @@
         HasBMI2 = true;
         ToggleFeature(X86::FeatureBMI2);
       }
+#endif
       if (IsIntel && ((EBX >> 11) & 0x1)) {
         HasRTM = true;
         ToggleFeature(X86::FeatureRTM);